In the CSAP Laboratory, we focus on computer systems and platforms for future computing devices. Recently, more and more cores are integrated into one single chip. To use such systems in an efficient manner, a holistic approach that coordinates research on all levels from architecture, to the compiler, the operating system and the programming model is needed. The methodologies to manage such many-core resources can be extended to manage big distributed systems such as big data processing platforms and clouds. Our main research focus is efficient system resource management schemes from single-chip many cores to network-based distributed systems.
We currently conduct research in the following areas.
- Compilers and runtime-environments for next-generation many-core coarse-grained reconfigurable architectures.
- Operating systems for heterogeneous many-core systems.
- Virtualization techniques on many-core systems/clouds
Coarse-grained reconfigurable architectures (CGRA)
CGRAs are composed of several computing units and register files with a configurable interconnection network. CGRAs combine the flexibility of software with the performance of parallel hardware.
Next generation SRP compiler
SRP is CGRA architecture of Samsung Electronics. In this research, we focus on reducing energy consumption and reducing the effort necessary to efficiently execute an application on the SRP. To accomplish the feasibility of the proposed approach, we develop a compiler backend and simulator.
Chip Verification of CGRAs
Chip verification of CGRAs is an important area of CGRA research. We are researching compiler-assisted generation of random test code that enables hardware manufacturers to quickly and efficiently verify the functional correctness of their CGRA hardware design.
Operating systems for heterogeneous many-core processors
Managing a large number of heterogeneous independent cores with the goal to provide maximal performance at a minimal energy consumption poses lots of interesting new challenges for operating system architects.
A scalable OS structure for many-core systems
For future many-core chips that contain hundreds of heterogeneous cores, various interconnection networks and complex memory hierarchies, proper resource allocation for simultaneously running applications is an important research topic. To address this issue, we are conducting research on an OS structure that allocates separated H/W resources for applications in which each application performs application-specific resource management. Currently, we are developing scheduling techniques that dynamically allocate core resources for simultaneously running parallel applications. Our final goal is to build an OS prototype that provides a scalable resource management scheme for many-core applications from high-performance computing to the big data processing and virtual machines.
Energy-aware Runtime Systems
Modern CMPs often do not provide DVFS at the core-level, but instead group several cores into frequently and voltage domains. This design hinders application of existing power management techniques. Our research shows that through cooperation between the coarse-grained resource manager and the application-specific runtime it is possible to re-assign cores transparently. This allows grouping of cores with similar load patterns and, as a consequence, allows more efficient DVFS settings.
Improving Resource Utilization of Data Centers
Modern data centers are poorly utilized due to lack of intelligent resource management software. To improve data center utilization, the resource manager needs to find proper placement of applications on servers that minimize interference and maximizing performance. Our research topics include efficient interference management technique using machine learning and dynamic relocation of applications with load prediction.